About hsyeo

Biography

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Hwanseok Yeo is currently working toward the Ph.D. degree in electrical engineering at Seoul National University and his research interests include low-power mixed-signal systems and their design methodologies. He received B.S. and M.S. degrees in electrical engineering from Sogang University in 2003 and 2005 respectively. From 2005 to 2011, he was a design engineer with Samsung Electronics, Korea, working on PLL/DLL designs for high-speed interfaces, LCD timing controllers and mobile application processors.

Contact Information
- Email: <hsyeo AT mics.snu.ac.kr>
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Research Interests

High-Performance PLL/CDR Design using Digital Techniques
And Their Related Circuits and Issues
All-Digital PLL-Based Transmitter
Ultra-Fast PLL Settling and High-Speed Digitally-Controlled Oscillator (DCO)
Wide-Bandwidth All-Digital PLL

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-From 2005 to 2011, he was a design engineer with Samsung Electronics, Korea, working on PLL/DLL designs for high-speed interfaces, LCD timing controllers and mobile application processors.<<BR>><<BR>>'''Contact Information'''<<BR>>''- Email: <<MailTo(hsyeo AT SPAMFREE mics DOT snu DOT ac DOT kr)>>''<<BR>>'' || {{attachment:hsyeo.jpg|syjung|width="160"}} ||
+From 2005 to 2011, he was a design engineer with Samsung Electronics, Korea, working on PLL/DLL designs for high-speed interfaces, LCD timing controllers and mobile application processors.<<BR>><<BR>>'''Contact Information'''<<BR>>''- Email: <<MailTo(hsyeo AT mics.snu.ac.kr)>>''<<BR>>'' || {{attachment:hsyeo.jpg|syjung|width="160"}} ||