Biography
|
|
Research Interests
- Cell-Based Design Flow
- High-Performance PLL Design using Digital Techniques
- Mixed-Signal High-Speed Link Architecture
Publications
- Eunseo Kim and Jaeha Kim, "A Constant Relative-Gain DCO with Pseudo-Exponential DAC and FVC Feedback for a Constant Loop-Bandwidth PLL", International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC), 2015